update: 3-10-6 10:17
filename: at24c01.txt

- ====================================================================
 - v2.0.0.2
 		1. modify "bitr	emb"
 					3-10-6 10:17

- ====================================================================
 - v2.0.0.1
 		1. modify at24c01_stop "bitr	emb"
 					3-9-30 15:19

- ====================================================================
 - v2.0.0.0
 		1. at24c02 success 
 		2. only append at24c01 eeprom address define
 					3-9-30 14:46

- ====================================================================
 - v1.0.0.0
 		1. at24c01 success 
 					3-9-30 13:57
 					
=============
 -- 3316ram.hea
=============
; =============================================================
; at24c01 variables
gAt24c01_Begin:			.equ		gClk_End+00h         ; gClk_End + 08h = 38h
gAt24c01_Data:			.equ		gAt24c01_Begin+00h   ; 8bit
gAt24c01_Address:		.equ        gAt24c01_Begin+02h   ; 8bit
gAt24c01_End:			.equ		gAt24c01_Begin+04h

=============
˵
=============
gAt24c01_Data:		дһݲ(at24c01_write_byte)ʱʱҪдݡ
gAt24c01_Address:	дһݲ(at24c01_write_byte)ʱʱҪдeepromַ

ʱ


=============
ͷļ -- at24c01.hea
=============
; ============================================================
; pin define
pAt24c01_SDA:			    I/OŶ
pAt24c01_SCL:			    ʱI/OŶ

; const define
cAt24c01_SDA_In:             at24c01 -> mcu
cAt24c01_SDA_Out:            mcu -> at24c01

cAt24c01_Slave_Read:        at24c01 ʶ
cAt24c01_Slave_Write:       at24c01 дʶ

; variables define
gfAt24c01_SDA_Io_Ctl:        I/O  뻹

cAt24c01_Address_Begin:     .equ        00h
cAt24c01_Address00:         .equ        cAt24c01_Address_Begin+00h  ; 8bit
cAt24c01_Address01:         .equ        cAt24c01_Address_Begin+01h  ; 8bit
cAt24c01_Address02:         .equ        cAt24c01_Address_Begin+02h  ; 8bit
cAt24c01_Address03:         .equ        cAt24c01_Address_Begin+03h  ; 8bit
cAt24c01_Address04:         .equ        cAt24c01_Address_Begin+04h  ; 8bit
cAt24c01_Address05:         .equ        cAt24c01_Address_Begin+05h  ; 8bit
CAt24c01_Address06:         .equ        cAt24c01_Address_Begin+06h  ; 8bit
CAt24c01_Address07:         .equ        cAt24c01_Address_Begin+07h  ; 8bit
;       .
;       .
;       .
cAt24c01_Address7d:         .equ        cAt24c01_Address_Begin+7dh  ; 8bit
cAt24c01_Address7e:         .equ        cAt24c01_Address_Begin+7eh  ; 8bit
cAt24c01_Address7f:         .equ        cAt24c01_Address_Begin+7fh  ; 8bit
cAt24c01_Address_End:       .equ        cAt24c01_Address_Begin+80h  ; no space

cAt24c01_Address:           .equ        cAt24c01_Address00

Ƕ at24c01 eeprom ĵַԾͱֵֵַ 00h  7fh 128 bytes ֵַ


=============
Դļ -- at24c01.src
=============

at24c01_start:		ʼעʼʱ(SDA) ʱ(SCL) ڸ̬(1)
at24c01_stop:		ֹͣbitr		emb 
at24c01_read_ack:	 acknowledge Ĵeepromж
at24c01_write:		д
at24c01_read_byte:	 eeprom ָĵַ һ 8bit ݡ
at24c01_write_byte:	 eeprom ָĵַ дһ 8bit ݡ

ǿԲõĲ  __AT24C01_LOCAL_NO_USE__ 
at24c01_read:		 acknowledge Ĵ eeprom ж
at24c01_ack:		 acknowledge 

=============
⣺
=============
1 at24c01_stop У bitr		emb 
2  eeprom ждݲûʵ֣
3õı gAt24c01_Data   gAt24c01_Address ûж塣 
	ֻʱԿʱ